You can lookup a single instruction by typing LD in the instruction field, which will show all load instructions. You can also lookup multiple instructions like LD,CMP.
You can also lookup mnemonics like LDX,LDY in the mnemonic field.
To see all instructions click the Show All link.
Show All | Registers | Addressing Modes | Post Bytes | Acknowledgments | Sock's GIME Reference | Sock's CPU Cycle Data Charts
Not case sensitive.
| * = 6309 | Immediate | Direct | Indexed | Extended | Inherent | Relative | Register | Memory | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| * | Mnemonic | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length |
| * | BAND | 1130 | 7/6 | 4 | |||||||||||||||||||||
BAND r,sBit,dBit,addr
Logically AND Register Bit with Memory Bit [r.dstBit' <- r.dstBit AND (DPM).srcBit]
The BAND instruction logically ANDs the value of a specified bit in either the A, B or CC registers with a specified bit in memory. The resulting value is placed back into the register bit. None of the Condition Code fags are affected by the operation unless CC is specified as the register, in which case only the destination bit may be affected. The usefulness of the BAND instruction is limited by the fact that only Direct Addressing is permitted.