You can lookup a single instruction by typing LD in the instruction field, which will show all load instructions. You can also lookup multiple instructions like LD,CMP.
You can also lookup mnemonics like LDX,LDY in the mnemonic field.
To see all instructions click the Show All link.
Show All | Registers | Addressing Modes | Post Bytes | Acknowledgments | Sock's GIME Reference | Sock's CPU Cycle Data Charts
Not case sensitive.
* = 6309 | Immediate | Direct | Indexed | Extended | Inherent | Relative | Register | Memory | |||||||||||||||||
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* | Mnemonic | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length | Opcode | Cycles | Length |
TFR | 1F | 6/4 | 2 |
Transfer Register to Register r0 → r1
Note that TFR destroys the old contents of the destination register. You can save those contents in the source register by using EXG instead. TFR, however, does not change the contents of the source register.
All TFR instructions require two bytes of program memory - the operation code and the post byte (the immediate data), which specifies the source and destination registers. Be careful of the fact that some TFR instructions are meaningless (undefined register codes), while others are illegal (transferring contents between registers of different sizes). The post byte for the TFR instruction is identical to the post byte illustrated in the EXG instruction description.
The TFR post byte's higher order four bits define the source register while the lower order four bits define the destination register. The flags are unaffected unless CCR is the destination register.
lda #$55
ldb #0
tfr a,b ; transfer a to b
ldx #$1234
ldx #0
tfr x,y ; transfer x to y
tfr d,x ; transfer d to x
lda #$55
ldb #0
tfr a,b ; transfer A to B